Enthernet Code
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•Created by Camila_99$$ on 10/2/2024 in #firmware-and-baremetal
Why Does Disabling OCIE1A Cause Immediate ISR Re-trigger on Mega 2560?
@Camila_99$$ The issue you're facing with the
ISR in your code is likely due to a timing problem when clearing the OCIE1A bit inside the interrupt. When you clear this bit within the ISR, it may cause the interrupt to trigger prematurely, as if OCR1A were set to 0. However, if you don't clear the bit|, the ISR` works but gets triggered multiple times before the next zero-cross event.3 replies