ZacckOsiemo
ZacckOsiemo
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DIIDevHeads IoT Integration Server
Created by lokii on 9/13/2024 in #firmware-and-baremetal
Why does enabling SPI peripheral in STM32 Nucleo L476RG change the master bit to 0?
I would say that's implicit, since thats the reset condition. How about something like 
pI2Cx->CR1 &= ~(1 << I2C_CR1_PE_Pos);
pI2Cx->CR1 &= ~(1 << I2C_CR1_PE_Pos);
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