wafa_ath
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DIIDevHeads IoT Integration Server
Created by lokii on 9/13/2024 in #firmware-and-baremetal
Why does enabling SPI peripheral in STM32 Nucleo L476RG change the master bit to 0?
Hi @Enthernet Code modify your SPI_PeripheralControl function to use a read-modify-write operation: 
void SPI_PeripheralControl(SPI_RegDef_t *pSPIX, uint8_t EnOrDi)
{
    uint16_t temp = pSPIX->CR1;
    if(EnOrDi == ENABLE)
    {
        temp |= (1 << SPI_CR1_SPE);
    }
    else
    {
        temp &= ~(1 << SPI_CR1_SPE);
    }
    pSPIX->CR1 = temp;
}
void SPI_PeripheralControl(SPI_RegDef_t *pSPIX, uint8_t EnOrDi)
{
    uint16_t temp = pSPIX->CR1;
    if(EnOrDi == ENABLE)
    {
        temp |= (1 << SPI_CR1_SPE);
    }
    else
    {
        temp &= ~(1 << SPI_CR1_SPE);
    }
    pSPIX->CR1 = temp;
}
This approach preserves other bits in the CR1 register while modifying only the SPE bit.
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