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•Created by Sterling on 9/11/2024 in #firmware-and-baremetal
How to Manually Program an Interrupt Service Routine (ISR) for STM32F4 MCU Without Using Libraries?
First things first - lets keep in mind there are multiple layers of abstraction in the ecosystem
You have the ST high level and low level HALs - it is very common to not use these, or just use them as reference / guidance when implementing your own drivers
Then there is CMSIS - this is a standard made by arm so we don't reinvent the wheel a million times in how some basic functions are handled, taking care of some of the core Cortex-XX things. In general, use CMSIS and don't throw it away - it is much less common to not use CMSIS than it is to not use whichever HAL
NVIC_SetPriority comes from CMSIS - so typically we would always use it
(it's worth noting here, part of why Cortex-M3 was novel was ARM made not just the core, but a bunch of supporting stuff too, they mandated that there would be an NVIC and a Systick in all the systems and so these parts can be common even across different manufacturers, never mind parts - this is a huge step up from the older days. We can see some of the pain of the many interrupt handler implementations in the RISCV ecosystem today, though I suspect that will normalise over time)
If you look at it though, all it does is poke a couple of registers, there is absolutely nothing stopping you poking those registers directly - we can definitely replace NVIC_SetPriority if we want to - I would go as far as to say this is easy.
One other note on things to consider throwing away and things to keep - keep the low level device headers i.e. the ones which give names to the memory map: https://github.com/STMicroelectronics/cmsis_device_f4/blob/master/Include/stm32f407xx.h - we generate them now from svd
To do an interrupt from scratch we need to go further though. At the end of the day, an interrupt is some function, with some specific calling convention, which exists at some explicit location in memory. We will see some systems let us point the NVIC to an interrupt table at various locations and know this can be somewhat configurable.9 replies