How can I achieve high-frequency (over 100kHz) data acquisition with an STM32F107VC using SPI

Please how can I achieve high-frequency (over 100kHz) data acquisition with an STM32F107VC using SPI for an ADC while considering limitations of RTOS tick frequency? FreeRTOS seems insufficient, and high tick rates in Keil RTX5 raise concerns. What's the best approach? @Middleware & OS
Solution:
Sure, DMA is ideal! Here are some key points for configuration: 1. Buffer Size:Choose a buffer size that holds enough samples to minimize data loss at high speeds. Consider factors like ADC sampling rate and desired data acquisition duration. 2. Interrupt Strategy: Configure DMA to generate an interrupt when the transfer completes (or halfway for double buffering). This allows the RTOS to handle post-processing efficiently. ...
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3 Replies
Marvee Amasi
Marvee AmasiOP5mo ago
Dma First of check the ads sampling rate of your adc After that you can put timer to read data at 100khz interval i think soo If spi has dma use that so cpu is unloaded For high-speed (>100kHz) ADC data acquisition on STM32F107VC with SPI, ditch the RTOS tick limitation. Use DMA with timer triggers for data transfer and interrupt for post-processing. FreeRTOS is fine for other tasks. For max performance, consider Keil RTX5 with a balance of tick rate and context switching. Is there anything specific I should consider when configuring the DMA for high-frequency data acquisition with the SPI and ADC? For example, any recommendations on buffer size or interrupt handling strategies? @electro_coco Your buffer should be circular so you keep reading data continues Rest i donot know maybe someone else can help
Solution
Marvee Amasi
Marvee Amasi5mo ago
Sure, DMA is ideal! Here are some key points for configuration: 1. Buffer Size:Choose a buffer size that holds enough samples to minimize data loss at high speeds. Consider factors like ADC sampling rate and desired data acquisition duration. 2. Interrupt Strategy: Configure DMA to generate an interrupt when the transfer completes (or halfway for double buffering). This allows the RTOS to handle post-processing efficiently. Let me know if you'd like to delve deeper into specific aspects of DMA setup
Marvee Amasi
Marvee AmasiOP5mo ago
Thanks
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