Looking for some help with getting Clock output on MCO1 (PA8) from LSE

Looking for some help with getting Clock output on MCO1 (PA8) from LSE here's a snippet of what I am doing. My logic analyzer gets no pulse from the LSE. My board is a STM32f407
/*
* Configure PA8 for MCO1 so we can use it for timer output
*/
static void ConfigurePA8(void){

RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;

GPIOA->MODER |= GPIO_MODER_MODER8_1;
GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR8;
GPIOA->AFR[1] &= ~GPIO_AFRH_AFRH0;

}

/*
* Configure LSE and ouput it on a pin so we can measure it with input compare
* */
static void ConfigureLSE(void){
ConfigurePA8();


// Enable the power interface clock
RCC->APB1ENR |= RCC_APB1ENR_PWREN;

// Enable access to the backup domain
PWR->CR |= PWR_CR_DBP;

// Wait for the backup domain write protection disable bit to take effect
while ((PWR->CR & PWR_CR_DBP) == 0) {


}

// Perform a backup domain reset
RCC->BDCR |= RCC_BDCR_BDRST;

// Release the backup domain reset
RCC->BDCR &= ~RCC_BDCR_BDRST;

// Enable the LSE oscillator
RCC->BDCR |= RCC_BDCR_LSEON;

// Wait until LSE is ready
while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0) {


}

// POINT Clock output GPIO (PA8 in this case)
RCC->CFGR |= RCC_CFGR_MCO1_0;



}
/*
* Configure PA8 for MCO1 so we can use it for timer output
*/
static void ConfigurePA8(void){

RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;

GPIOA->MODER |= GPIO_MODER_MODER8_1;
GPIOA->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR8;
GPIOA->AFR[1] &= ~GPIO_AFRH_AFRH0;

}

/*
* Configure LSE and ouput it on a pin so we can measure it with input compare
* */
static void ConfigureLSE(void){
ConfigurePA8();


// Enable the power interface clock
RCC->APB1ENR |= RCC_APB1ENR_PWREN;

// Enable access to the backup domain
PWR->CR |= PWR_CR_DBP;

// Wait for the backup domain write protection disable bit to take effect
while ((PWR->CR & PWR_CR_DBP) == 0) {


}

// Perform a backup domain reset
RCC->BDCR |= RCC_BDCR_BDRST;

// Release the backup domain reset
RCC->BDCR &= ~RCC_BDCR_BDRST;

// Enable the LSE oscillator
RCC->BDCR |= RCC_BDCR_LSEON;

// Wait until LSE is ready
while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0) {


}

// POINT Clock output GPIO (PA8 in this case)
RCC->CFGR |= RCC_CFGR_MCO1_0;



}
Solution:
found thus is due to a missing xtal
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2 Replies
Solution
ZacckOsiemo
ZacckOsiemo6mo ago
found thus is due to a missing xtal
Marvee Amasi
Marvee Amasi5mo ago
Nice 👍
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