Using atomic operations to update the SPI busy flag in FreeRTOS

Hi everyone @Middleware & OS , I'm working on an embedded project using FreeRTOS . I encountered a scenario where I need to atomically clear an SPI busy flag (spiTxRxByteCount) to ensure thread safety. Disabling interrupts is a common approach, but I was wondering if we could achieve the same outcome using atomic operations provided by FreeRTOS.
static void ClearSpiBusyFlag(void) {
uint8_t new_state = spiTxRxByteCount & ~0x0100;
spiTxRxByteCount = AtomicCompareSet(spiTxRxByteCount, new_state);
}
static void ClearSpiBusyFlag(void) {
uint8_t new_state = spiTxRxByteCount & ~0x0100;
spiTxRxByteCount = AtomicCompareSet(spiTxRxByteCount, new_state);
}
My current approach utilizes a function like ClearSpiBusyFlag that leverages AtomicCompareSet to update the flag atomically. Is this a valid approach, or are there potential drawbacks compared to interrupt disabling? In your experience, what are the best practices for handling such scenarios in FreeRTOS development?
3 Replies
Enthernet Code
Enthernet Code5mo ago
Using atomic operations to update the SPI busy flag in FreeRTOS could be a valid approach, depending on your specific requirements and constraints ,i.e: Evaluate the criticality of the operation Consider interrupt latency Analyze the usage context. In general, using atomic operations to update the SPI busy flag in FreeRTOS can be a valid approach depending on your specific requirements. Considering the criticality of the operation, assess interrupt latency and system performance impact, analyzing the usage context, and thoroughly test and verify the thread safety of your implementation.
Marvee Amasi
Marvee Amasi5mo ago
@Enthernet Code Thank you for the detailed explanation, it's really helpful. Could you elaborate a bit on how the criticality of the SPI operation and interrupt latency would influence the choice between atomic operations and interrupt disabling? Are there any specific guidelines for making this decision?
Dtynin
Dtynin5mo ago
@Marvee Amasi If failing to update the SPI flag atomically has severe consequences, using atomic operations is preferred. This guarantees no interference during the update. Also know that If the consequences are less severe, interrupt latency might become a factor. Disabling interrupts for a long time might impact system performance. Atomic operations are generally faster than disabling interrupts
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