What’s the best PCIe Gen 5 clock source for board-board data transfer over a backplane?
I’m designing a high-frequency control system based on a Xilinx FPGA-based board that connects to multiple FPGA daughter cards over a PCIe switch and backplane using PCIe 5.
Does anyone have experience designing a similar system? Any recommendations for the clocking architecture and clock types in this application? I’m looking to minimize jitter but not sure separate reference clocks alone like I’ve used in the past will suffice with the PCIe 5 bandwidth and frequencies.
Any advice is appreciated. Thanks.
1 Reply
No, I have not had any experience with PCIe Gen 5. I am not sure I will ever be ready for designing such fast transmission lines. You should connect with some redriver device manufacturers to discuss the topic.